View LT8610AC-1-15_8182339.PDF datasheet online --- IC-ON-LINE

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1 for more information www.linear.com/lt8610ac typical a pplica t ion fea t ures descrip t ion 42v, 3.5a synchronous step-down regulator with 2.5a quiescent current the lt ? 8610ac/ lt8610ac-1 is a compact, high efficiency, high speed synchronous monolithic step-down switching regulator that consumes only 2.5 a of quiescent current. compared to the lt8610ab, the lt8610ac/lt8610ac-1 has a lower feedback voltage of 800 mv and a lower mini - mum v in of 3 v. the lt8610ac/lt8610ac-1 has the same additional features of the lt8610ab as compared to the lt8610: higher maximum output current of 3.5 a, faster minimum on time of 30 ns, and higher light load efficiency. the lt8610ac/lt8610ac-1 has a sync pin for syn - chronization to an external clock. a capacitor on the tr/ ss pin programs the output voltage ramp rate during startup. the pg flag signals when v out is within 8% of the programmed output voltage as well as fault conditions. the lt8610ac-1 has internal compensation optimized for high switching frequencies resulting in improved transient response compared to the lt8610ac . the lt8610ac-1 also has a feature which will soft-start the part when exiting dropout or brownout conditions reducing output voltage overshoot. feedback voltage min v in output current min on time improved emi lt8610ac 0.80v 3.0v 3.5a 30ns yes lt8610ab* 0.97v 3.4v 3.5a 30ns yes lt8610a* 0.97v 3.4v 3.5a 30ns yes lt8610* 0.97v 3.4v 2.5a 50ns C *see lt8610a/lt8610ab or lt8610 data sheet. 5v 3.5a step-down converter a pplica t ions n lt8610 feature set, plus: 3 v minimum input voltage 800 mv feedback voltage 3.5a maximum output current fast 30ns minimum switch-on time improved burst mode efficiency improved emi n wide input voltage range: 3v to 42v n ultralow quiescent current burst mode ? operation: 2.5a i q regulating 12v in to 3.3v out n high efficiency synchronous operation: 95% efficiency at 1a, 5v out from 12v in 93% efficiency at 1a, 3.3v out from 12v in n low dropout under all conditions: 200mv at 1a n safely tolerates inductor saturation in overload n adjustable and synchronizable frequency: lt8610ac: 200khz to 2.2mhz lt8610ac-1: 1.5mhz to 2.2mhz n accurate 1.015v enable pin threshold n output soft-start and tracking n small thermally enhanced 16-lead msop package n automotive and industrial supplies n gsm power supplies l , lt , lt c , lt m , burst mode, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. efficiency at 5v out bst v in en/uv pg sync intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta01a fb 0.1f v out 5v 3.5a 4.7f v in 5.5v to 42v 1f 10nf 10pf 4.7h 1m 191k f sw = 700khz 60.4k 47f 2 0.1 1 1000 100 10 load current (ma) efficiency (%) 80 90 100 8610ac1 ta01b 70 50 60 40 30 v in = 12v v in = 24v v in = 36v lt8610ac/lt8610ac-1 8610acfa
2 for more information www.linear.com/lt8610ac p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in , en / uv , pg .......................................................... 42 v bias .......................................................................... 30 v bst pin a bove sw pin ................................................4v fb , tr / ss , rt, intv cc . .............................................. 4v sync volt age . ............................................................ 6v oper ating junction temperature range ( note 2) lt 8610 ace / lt 8610 a ce -1 ...................... C40 to 125 c lt 8610 aci / lt 8610 a ci -1 ........................ C40 to 125 c lt 8610 ach / lt 8610 a ch -1 ..................... C40 to 150 c storage temperature range ...................... C65 to 150 c (note 1) 1 2 3 4 5 6 7 8 sync tr/ss rt en/uv v in v in nc gnd 16 15 14 13 12 11 10 9 fb pg bias intv cc bst sw sw sw top view 17 gnd mse package 16-lead plastic msop ja = 40c/w, jc( pad ) = 10c/w exposed pad (pin 17) is gnd, must be soldered to pcb e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt8610acemse#pbf lt8610acemse#trpbf 8610ac 16-lead plastic msop C40c to 125c lt8610acimse#pbf lt8610acimse#trpbf 8610ac 16-lead plastic msop C40c to 125c lt8610achmse#pbf lt8610achmse#trpbf 8610ac 16-lead plastic msop C40c to 150c lt8610acemse-1#pbf lt8610acemse-1#trpbf 610ac1 16-lead plastic msop C40c to 125c lt8610acimse-1#pbf lt8610acimse-1#trpbf 610ac1 16-lead plastic msop C40c to 125c lt8610achmse-1#pbf lt8610achmse-1#trpbf 610ac1 16-lead plastic msop C40c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container .consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ parameter conditions min typ max units minimum input voltage l 2.6 3.0 v v in quiescent current v en/uv = 0v l 1.0 1.0 3 8 a a v en/uv = 2v, not switching, v sync = 0v l 1.7 1.7 4 10 a a v en/uv = 2v, not switching, v sync = 2v 0.28 0.5 ma v in current in regulation v out = 0.8v, v in = 6v, output load = 100a v out = 0.8v, v in = 6v, output load = 1ma l l 30 225 60 500 a a feedback reference voltage v in = 6v, i load = 0.5a v in = 6v, i load = 0.5a l 0.794 0.788 0.800 0.800 0.806 0.812 v v feedback voltage line regulation v in = 4.0v to 42v, i load = 1a l 0.004 0.02 %/v feedback pin input current v fb = 1v C20 20 na lt8610ac/lt8610ac-1 8610acfa
3 for more information www.linear.com/lt8610ac e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt8610ace/lt8610ace-1 is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the lt8610aci/lt8610aci-1 is guaranteed over the full C40c to 125c the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. parameter conditions min typ max units intv cc voltage i load = 0ma, v bias = 0v i load = 0ma, v bias = 3.3v 3.23 3.25 3.4 3.29 3.57 3.35 v v intv cc undervoltage lockout 2.37 2.47 2.57 v bias pin current consumption v bias = 3.3v, i load = 1a, 2mhz 9.2 ma minimum on-time i load = 1a, sync = 0v i load = 1a, sync = 3.3v l l 15 15 30 30 45 45 ns ns minimum off-time 95 125 ns oscillator frequency r t = 221k, i load = 1a (lt8610ac only) r t = 60.4k, i load = 1a (lt8610ac only) r t = 18.2k, i load = 1a (lt8610ac/lt8610ac-1) l l l 180 665 1.85 210 700 2.00 240 735 2.15 khz khz mhz top power nmos on-resistance i sw = 1a 120 m top power nmos current limit l 5 6.7 8 a bottom power nmos on-resistance v intvcc = 3.4v, i sw = 1a 65 m bottom power nmos current limit v intvcc = 3.4v 3.4 4.3 5.4 a sw leakage current v in = 42v, v sw = 0v, 42v C1.5 1.5 a en/uv pin threshold en/uv rising l 0.955 1.015 1.075 v en/uv pin hysteresis 50 mv en/uv pin current v en/uv = 2v C20 20 na pg upper threshold offset from v fb v fb falling l 5 8.0 11 % pg lower threshold offset from v fb v fb rising l C11 C8.0 C5 % pg hysteresis 0.4 % pg leakage v pg = 3.3v C40 40 na pg pull-down resistance v pg = 0.1v l 680 2000 sync threshold sync falling sync rising 0.8 1.6 1.1 2.0 1.4 2.4 v v tr/ss source current l 1.0 2.0 3.2 a tr/ss pull-down resistance fault condition, tr/ss = 0.1v 230 operating junction temperature range. the lt8610ach/lt8610ach-1 is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 3: this ic includes overtemperature protection that is intended to protect the device during overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature will reduce lifetime. lt8610ac/lt8610ac-1 8610acfa
4 for more information www.linear.com/lt8610ac typical p er f or m ance c harac t eris t ics efficiency at 3.3v out efficiency vs frequency at 1a reference voltage efficiency at 5v out efficiency at 5v out efficiency at 3.3v out load current (a) 0 efficiency (%) 80 90 100 2 3 8610ac1 g01 70 60 75 85 95 65 55 50 0.5 1 1.5 3.5 2.5 f sw = 700khz (lt8610ac) l = ihlp-2525ez-01, 4.7h v in = 12v v in = 24v v in = 36v load current (ma) efficiency (%) 0.01 101 1000 100 8610ac1 g02 0.1 80 90 100 70 50 60 40 20 30 v in = 12v v in = 24v v in = 36v f sw = 700khz (lt8610ac) l = ihlp-2525ez-01, 4.7h 0 2 3 0.5 1 1.5 3.5 2.5 load current (a) efficiency (%) 80 90 100 8610ac1 g03 70 60 75 85 95 65 55 50 v in = 12v v in = 24v v in = 36v f sw = 700khz (lt8610ac) l = ihlp-2525ez-01, 4.7h 0.01 101 1000 100 0.1 v in = 12v v in = 24v v in = 36v load current (ma) 30 efficiency (%) 90 100 80 50 70 60 40 8610ac1 g04 20 f sw = 700khz (lt8610ac) l = ihlp-2525ez-01, 4.7h switching frequency (mhz) 0.25 80 85 100 1.75 8610ac1 g05 75 70 0.75 1.25 2.25 1.50 0.50 1.00 2.00 65 60 90 95 efficiency (%) v in = 12v v in = 24v v out = 3.3v l = ihlp-2525ez-01, 4.7h (lt8610ac) temperature (c) ?55 fb pin voltage (v) 35 8610ac1 g06 0.800 ?25 5 65 0.792 0.796 0.788 0.784 0.816 0.812 0.804 0.808 95 125 155 temperature (c) ?55 en threshold (v) 35 8610ac1 g07 1.00 ?25 5 65 0.96 0.98 0.94 0.92 1.04 1.02 95 125 155 en rising en falling line regulation load regulation load current (a) 0 ?0.25 change in v out (%) ?0.15 ?0.05 0.05 0.5 1 1.5 2 8610ac1 g08 2.5 0.15 0.25 ?0.20 ?0.10 0 0.10 0.20 3.5 3 v out = 3.3v v in = 12v input voltage (v) 0 change in v out (%) 0.03 0.09 0.15 40 8610ac1 g09 ?0.03 ?0.09 0 0.06 0.12 ?0.06 ?0.12 ?0.15 105 2015 30 35 45 25 v out = 3.3v i load = 0.5a t a = 25c, unless otherwise noted. en pin thresholds lt8610ac/lt8610ac-1 8610acfa
5 for more information www.linear.com/lt8610ac typical p er f or m ance c harac t eris t ics no load supply current no load supply current top fet current limit vs duty cycle top fet current limit bottom fet current limit input voltage (v) 0 0 input current (a) 0.5 1.5 2.0 2.5 5.0 3.5 10 20 25 45 8610ac1 g10 1.0 4.0 4.5 3.0 5 15 30 35 40 v out = 3.3v in regulation temperature (c) ?55 ?25 0 input current (a) 10 25 5 65 95 8610ac1 g11 5 20 15 35 125 155 v out = 3.3v v in = 12v in regulation duty cycle 0 current limit (a) 3.5 4.0 4.5 0.6 1.0 8610ac1 g12 3.0 0.2 0.4 0.8 5.0 5.5 8.0 7.0 7.5 6.5 6.0 temperature (c) ?55 4.50 current limit (a) 4.75 5.00 5.25 5.50 5.75 6.00 6.25 6.50 6.75 7.00 ?25 5 35 65 8610ac1 g13 95 125 30% dc temperature (c) ?55 3.00 current limit (a) 3.25 3.50 3.75 4.00 5.50 ?25 5 35 65 8610ac1 g14 95 155 125 4.25 4.50 4.75 5.00 5.25 switch drop switch drop temperature (c) ?55 ?25 0 switch drop (mv) 100 250 5 65 95 8610ac1 g15 50 200 150 35 125 155 top sw bot sw switch current = 1a switch current (a) 0 0 switch drop (mv) 50 150 200 250 2 450 8610ac1 g16 100 1 0.5 2.5 1.5 3 300 350 400 top sw bot sw minimum on-time minimum off-time temperature (c) ?55 25 27 29 31 minimum on-time (ns) 33 35 37 39 45 5 65 95 125 8610ac1 g17 43 41 ?25 35 155 v out = 3.3v v out = 0.8v i load = 1.5a v sync = 5v temperature (c) ?50 minimum off-time (ns) 95 35 8610ac1 g18 80 ?25 5 65 75 125 120 115 110 105 100 90 85 95 125 155 v out = 3.3v i load = 0.5a t a = 25c, unless otherwise noted. lt8610ac/lt8610ac-1 8610acfa
6 for more information www.linear.com/lt8610ac typical p er f or m ance c harac t eris t ics minimum load to full frequency burst frequency frequency foldback input voltage (v) load current (ma) 60 70 80 15 25 40 8610ac1 g22 40 20 0 50 30 10 5 10 20 30 35 v out = 3.3v f sw = 700khz pulse-skipping mode (lt8610ac) fb voltage (v) 0 switching frequency (khz) 300 400 500 0.6 0.8 8610ac1 g23 200 100 0 0.2 0.4 0.5 0.1 0.3 0.7 600 700 800 v out = 3.3v v in = 12v v sync = 0v r t = 60.4k (lt8610ac) load current (ma) 0 switching frequency (khz) 400 500 600 800 8610ac1 g21 300 200 0 200 400 600 700 100 300 500 100 800 v in = 12v v out = 3.3v l = 4.7h (lt8610ac) 700 soft-start tracking soft-start current pg high thresholds pg low thresholds tr/ss voltage (v) 0 fb voltage (v) 0.8 1.0 0.6 1.0 8610ac1 g24 0.6 0.4 0.2 0.4 0.8 1.2 0.2 0 temperature (c) ?50 ss pin current (a) 2.3 35 8610ac1 g25 2.0 1.8 ?25 5 65 1.7 1.6 2.4 2.2 2.1 1.9 95 125 155 v ss = 0.5v temperature (c) ?55 pg threshold offset from v ref (%) 35 8610ac1 g26 8.0 ?25 5 65 7.0 7.5 6.5 6.0 10.0 9.5 8.5 9.0 95 125 155 fb rising fb falling temperature (c) ?55 pg threshold offset from v ref (%) 35 8610ac1 g27 ?8.0 ?25 5 65 ?7.0 ?7.5 ?6.5 ?10.0 ?6.0 ?9.5 ?8.5 ?9.0 95 125 155 fb rising fb falling load current (a) dropout voltage (mv) 400 8610ac1 g19 200 0 600 800 300 100 500 700 0 0.5 1 1.5 2 2.5 3.5 3 dropout voltage switching frequency temperature (c) ?55 switching frequency (khz) 730 35 8610ac1 g20 700 680 ?25 5 65 670 660 740 r t = 60.4k (lt8610ac) 720 710 690 95 125 155 t a = 25c, unless otherwise noted. lt8610ac/lt8610ac-1 8610acfa
7 for more information www.linear.com/lt8610ac rt programmed switching frequency minimum input voltage bias pin current bias pin current switching frequency (mhz) 0.2 rt pin resistor (k) 150 200 250 1.8 8610ac1 g28 100 50 125 175 225 75 25 0 0.6 1 1.4 2.2 (lt8610ac) temperature (c) ?55 minimum input voltage (v) 2.9 35 8610ac1 g29 2.8 2.4 ?25 5 65 2.2 2.3 2.1 2.0 3.0 2.7 2.5 2.6 95 125 155 input voltage (v) 5 bias pin current (ma) 4.5 5.5 45 8610ac1 g30 3.5 2.5 15 25 35 10 20 30 40 6.5 4.0 5.0 3.0 6.0 v bias = 5v v out = 5v i load = 1a f sw = 700khz (lt8610ac) switching frequency (mhz) 0 0 bias pin current (ma) 2 4 6 8 10 12 0.5 1 1.5 2 8610ac1 g31 2.5 v bias = 5v v out = 5v v in = 12v i load = 1a (lt8610ac) typical p er f or m ance c harac t eris t ics switching waveforms burst mode operation switching waveforms i l 1a/div v sw 5v/div 500ns/div 12v in to 5v out at 1a 8610ac1 g32 i l 500ma/div v sw 5v/div v out 20mv/div 20s/div v sync = 0v c out = 47f l = 4.7h 8610ac1 g33 i l 1a/div v sw 10v/div 500ns/div 36v in to 5v out at 1a 8610ac1 g34 t a = 25c, unless otherwise noted. lt8610ac/lt8610ac-1 8610acfa
8 for more information www.linear.com/lt8610ac lt8610ac transient response start-up dropout performance lt8610ac-1 transient response lt8610ac-1 transient response lt8610ac transient response start-up dropout performance i l 2a/div v out 200mv/div 50s/div 1.5a to 3.5a transient 12v in , 3.3v out c out = 47f 2 8610ac1 g35 v out 1v/div v in 1v/div 100ms/div 2.5 load (2a in regulation) 8610ac1 g37 v in v out i l 2a/div v out 200mv/div 50s/div 200ma to 2a transient 12v in , 3.3v out c out = 47f 2 8610ac1 g36 v out 1v/div v in 1v/div 100ms/div 20 load (250ma in regulation) 8610ac1 g38 v in v out typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. lt8610ac/lt8610ac-1 8610acfa i out 2a/div v out 200mv/div 50s/div 1.5a to 3.5a transient 12v in , 3.3v out c out = 47f 2 8610ac1 g39 i out 2a/div v out 200mv/div 50s/div 100ma to 2a transient 12v in , 3.3v out c out = 47f 2 8610ac1 g40
9 for more information www.linear.com/lt8610ac p in func t ions sync (pin 1): external clock synchronization input. ground this pin for low ripple burst mode operation at low output loads. tie to a clock source for synchronization to an external frequency. apply a dc voltage of 3 v or higher or tie to intv cc for pulse-skipping mode. when in pulse- skipping mode, the i q will increase to several hundred a. do not float this pin. tr/ss (pin 2): output tracking and soft-start pin. this pin allows user control of output voltage ramp rate during start- up. a tr/ ss voltage below 0.8 v forces the lt8610ac/ lt8610ac-1 to regulate the fb pin to equal the tr/ss pin voltage. when tr/ss is above 0.8 v, the tracking function is disabled and the internal reference resumes control of the error amplifier. an internal 2.2 a pull-up current from intv cc on this pin allows a capacitor to program output voltage slew rate. this pin is pulled to ground with an internal 230 mosfet during shutdown and fault condi - tions; use a series resistor if driving from a low impedance output. this pin may be left floating in the lt8610ac if the tracking function is not needed. a minimum of 100pf of external capacitance must be used on the lt8610ac-1. rt (pin 3): a resistor is tied between rt and ground to set the switching frequency. en/uv (pin 4): the lt8610ac/lt8610ac-1 is shut down when this pin is low and active when this pin is high. the hysteretic threshold voltage is 1.015 v going up and 0.97v going down. tie to v in if the shutdown feature is not used. an external resistor divider from v in can be used to program a v in threshold below which the lt8610ac/ lt8610ac-1 will shut down. v in (pins 5, 6): the v in pins supply current to the lt8610ac/ lt8610ac-1 internal circuitry and to the internal topside power switch. these pins must be tied together and be locally bypassed. be sure to place the positive terminal of the input capacitor as close as possible to the v in pins, and the negative capacitor terminal as close as possible to the gnd pins. nc (pin 7): no connect. this pin is not connected to internal circuitry. sw (pins 9, 10, 11): the sw pins are the outputs of the internal power switches. tie these pins together and con - nect them to the inductor and boost capacitor. this node should be kept small on the pcb for good performance. bst (pin 12): this pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. place a 0.1 f boost capacitor as close as possible to the ic. intv cc (pin 13): internal 3.4 v regulator bypass pin. the internal power drivers and control circuits are pow- ered from this voltage. intv cc maximum output cur- rent is 20 ma. do not load the intv cc pin with external circuitry. intv cc current will be supplied from bias if v bias > 3.1 v, otherwise current will be drawn from v in . voltage on intv cc will vary between 2.8 v and 3.4 v when v bias is between 3.0 v and 3.6v . decouple this pin to power ground with at least a 1 f low esr ceramic capacitor placed close to the ic. bias ( pin 14): the internal regulator will draw current from bias instead of v in when bias is tied to a voltage higher than 3.1 v. for output voltages of 3.3 v and above this pin should be tied to v out . if this pin is tied to a supply other than v out use a 1f local bypass capacitor on this pin. pg (pin 15): the pg pin is the open-drain output of an internal comparator. pg remains low until the fb pin is within 8% of the final regulation voltage, and there are no fault conditions. pg is valid when v in is above 3.0v, regardless of en/uv pin state. fb (pin 16): the lt8610ac/lt8610ac-1 regulates the fb pin to 0.800 v. connect the feedback resistor divider tap to this pin. also, connect a phase lead capacitor between fb and v out . typically, this capacitor is 4.7pf to 10pf. gnd (pin 8, exposed pad pin 17): ground. these pins are the return path of the internal bottom-side switch and must be tied together. place the negative terminal of the input capacitor as close to the gnd pin and exposed pad as possible. the exposed pad must be soldered to the pcb in order to lower the thermal resistance. lt8610ac/lt8610ac-1 8610acfa
10 for more information www.linear.com/lt8610ac b lock diagra m + + ? + ? slope comp internal 0.80v ref oscillator burst detect 3.4v reg m1 m2 c bst c out v out 8610ac1 bd sw l bst 9-11 switch logic and anti- shoot through error amp shdn 8% v c shdn tsd intv cc uvlo v in uvlo shdn tsd v in uvlo en/uv 1v + ? 4 12 17 gnd intv cc 13 bias 14 gnd 8 pg 15 fb r1c1 r3 opt r4 opt r2 r t c ss opt v out 16 tr/ss 2.2a 2 rt 3 sync 1 v in v in c in c vcc 5, 6 lt8610ac/lt8610ac-1 8610acfa
11 for more information www.linear.com/lt8610ac o pera t ion the lt8610ac/ lt8610ac-1 is a monolithic, constant frequency, current mode step- down dc/ dc converter. an oscillator, with frequency set using a resistor on the rt pin, turns on the internal top power switch at the beginning of each clock cycle. current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. the peak inductor current at which the top switch turns off is controlled by the voltage on the internal vc node. the error amplifier servos the vc node by comparing the voltage on the v fb pin with an internal 0.8 v reference. when the load current increases it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the vc voltage until the average inductor current matches the new load current. when the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. if overload conditions result in more than 4.3 a flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. if the en/uv pin is low, the lt8610ac/lt8610ac-1 is shut down and draws 1 a from the input. when the en/uv pin is above 1.015v , the switching regulator will become active. to optimize efficiency at light loads, the lt8610ac/ lt8610ac-1 operates in burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 1.7 a. in a typical application, 2.5a will be consumed from the input supply when regulating with no load. the sync pin is tied low to use burst mode operation and can be tied to a logic high to use pulse-skipping mode. if a clock is applied to the sync pin the part will synchronize to an external clock frequency and operate in pulse-skipping mode. while in pulse-skipping mode the oscillator operates continuously and positive sw transitions are aligned to the clock. during light loads, switch pulses are skipped to regulate the output and the quiescent current will be several hundred a. to improve efficiency across all loads, supply current to internal circuitry can be sourced from the bias pin when biased at 3.3v or above. else, the internal circuitry will draw current from v in . the bias pin should be connected to v out if the lt8610ac/lt8610ac-1 output is programmed at 3.3v or above. comparators monitoring the fb pin voltage will pull the pg pin low if the output voltage varies more than 8% ( typical) from the set point, or if a fault condition is present. the oscillator reduces the lt8610ac/lt8610ac-1s oper - ating frequency when the voltage at the fb pin is low. this frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value which occurs during start-up or overcurrent condi - tions. when a clock is applied to the sync pin or the sync pin is held dc high, the frequency foldback is disabled and the switching frequency will slow down only during overcurrent conditions. the lt8610ac-1 differs from the lt8610ac in that the internal compensation is optimized for higher switching frequency operation and a tr/ss pin discharge circuit is added to reduce output voltage overshoot when exiting dropout or brownout conditions. the internal compensa - tion change increases the bandwidth of the control loop, which improves transient response. as a consequence the minimum programmable switching frequency of the lt8610ac-1 is increased to 1.5 mhz. the ss discharge circuit regulates the tr/ss pin to the same voltage as the fb pin during dropout or brownout. this feature provides some soft- starting when the part exits dropout or brownout which reduces output voltage overshoot. both of these changes are intended to reduce output voltage overshoot in 2mhz switching frequency applications. lt8610ac/lt8610ac-1 8610acfa
12 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion cal converters. by maximizing the time between pulses, the converter quiescent current approaches 2.5 a for a typical application when there is no output load. therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. while in burst mode operation the current limit of the top switch is approximately 1.3 a for the lt8610ac / lt8610ac-1 resulting in output voltage ripple shown in figure 2. an increase in output capacitance proportionally decreases the output voltage ripple ( table 1). as load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the rt pin as shown in figure 1 a. the output load at which the lt8610ac/lt8610ac-1 reaches the figure 1. sw frequency vs load information in burst mode operation (1a) and pulse-skipping mode (1b) figure 2. burst mode operation minimum load to full frequency burst frequency (1a) (1b) load current (ma) 0 switching frequency (khz) 400 500 600 800 8610ac1 f01a 300 200 0 200 400 600 700 100 300 500 100 800 v in = 12v v out = 3.3v l = 4.7h (lt8610ac) 700 input voltage (v) load current (ma) 60 70 80 15 25 40 8610ac1 f01b 40 20 0 50 30 10 5 10 20 30 35 v out = 3.3v f sw = 700khz pulse-skipping mode (lt8610ac) i l 500ma/div v out 20mv/div v sw 5v/div 20s/div v sync = 0v c out = 47f l = 4.7h 8610ac1 f02 achieving ultralow quiescent current to enhance efficiency at light loads, the lt8610ac/ lt8610ac-1 operates in low ripple burst mode operation, which keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent cur - rent and minimizing output voltage ripple. in burst mode operation the lt8610ac/ lt8610ac-1 delivers single pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. while in sleep mode the lt8610ac/ lt8610ac-1 consumes 1.7a. as the output load decreases, the frequency of single cur - rent pulses decreases (see figure 1 a ) and the percentage of time the lt8610ac/ lt8610ac-1 is in sleep mode increases , resulting in much higher light load efficiency than for typi - lt8610ac/lt8610ac-1 8610acfa
13 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion programmed frequency varies based on input voltage, output voltage, and inductor choice. inductor value has a very strong effect on burst mode ef - ficiency. larger value inductors allow more charge to be transferred to the output per pulse, which increases both efficiency and output voltage ripple. if higher efficiency is needed in a burst mode application, increasing inductor value can be a quick solution. table 1. output voltage ripple vs output capacitance for lt8610ac when v in = 12v, v out = 3.3v, and l = 4.7h output capacitance output ripple 47f 40mv 47f 2 20mv 47f 4 10mv for some applications it is desirable for the lt8610ac/ lt8610ac-1 to operate in pulse-skipping mode, offering two major differences from burst mode operation. first is the clock stays awake at all times and all switching cycles are aligned to the clock. in this mode much of the internal circuitry is awake at all times, increasing quiescent cur - rent to several hundred a. second is that full switching frequency is reached at lower output load than in burst mode operation ( see figure 1b). to enable pulse-skipping mode, the sync pin is tied high either to a logic output or to the intv cc pin. when a clock is applied to the sync pin the lt8610ac/lt8610ac-1 will also operate in pulse- skipping mode. fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the resistor values according to: r1 = r2 v out 0.80v C 1 ? ? ? ? ? ? (1) reference designators refer to the block diagram . 1% resistors are recommended to maintain output voltage accuracy. if low input quiescent current and good light - load efficiency are desired, use large resistor values for the fb resistor divider. the current flowing in the divider acts as a load current, and will increase the no-load input current to the converter, which is approximately: i q = 1.7a + v out r1 + r2 ? ? ? ? ? ? v out v in ? ? ? ? ? ? 1 n ? ? ? ? ? ? (2) where 1.7 a is the quiescent current of the lt8610ac/ lt8610ac-1 and the second term is the current in the feedback divider reflected to the input of the buck operating at its light load efficiency n. for a 3.3 v application with r1 = 1 m and r2 = 316 k, the feedback divider draws 2.5a. with v in = 12 v and n = 80%, this adds 0.8 a to the 1.7a quiescent current resulting in 2.5 a no-load current from the 12 v supply. note that this equation implies that the no-load current is a function of v in ; this is plotted in the typical performance characteristics section. when using large fb resistors, a 4.7 pf to 10 pf phase-lead capacitor should be connected from v out to fb. setting the switching frequency the lt8610ac uses a constant frequency pwm architec - ture that can be programmed to switch from 200 khz to 2.2mhz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 2 a. the lt8610ac-1 can be programmed to switch from 1.5 mhz to 2.2mhz. the minimum allowed programmable switching frequency is higher for the lt8610ac-1 compared to the lt8610ac because the lt8610ac-1 has internal compensation which is optimized for higher switching frequencies to improve transient response by increasing control loop bandwidth . a table showing the necessary r t value for a desired switching frequency is shown in table 2b. the r t resistor required for a desired switching frequency can be calculated using: r t = 46.5 f sw C 5.2 (3) where r t is in k and f sw is the desired switching fre- quency in mhz. lt8610ac/lt8610ac-1 8610acfa
14 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion table 2a. lt8610ac sw frequency vs r t value f sw (mhz) r t (k) 0.2 232 0.3 150 0.4 110 0.5 88.7 0.6 71.5 0.7 60.4 0.8 52.3 1.0 41.2 1.2 33.2 1.4 28.0 1.6 23.7 1.8 20.5 2.0 18.2 2.2 15.8 table 2b. lt8610ac-1 sw frequency vs r t value f sw (mhz) r t (k) 1.4 28.0 1.6 23.7 1.8 20.5 2.0 18.2 2.2 15.8 operating frequency selection and trade-offs selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. the advantage of high frequency operation is that smaller induc - tor and capacitor values may be used. the disadvantages are lower efficiency and a smaller input voltage range. the highest switching frequency ( f sw(max) ) for a given application can be calculated as follows: f sw(max) = v out + v sw(bot) t on(min) v in C v sw(top) + v sw(bot) ( ) (4) where v in is the typical input voltage, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.42v , ~0.21 v, respectively at maximum load) and t on(min) is the minimum top switch on-time ( see the electrical characteristics). this equation shows that a slower switching frequency is necessary to accommodate a high v in /v out ratio. for transient operation, v in may go as high as the abso- lute maximum rating of 42v regardless of the r t value, however the lt8610ac / lt8610ac-1 will reduce switching frequency as necessary to maintain control of inductor current to assure safe operation. the lt8610ac/ lt8610ac-1 is capable of a maximum duty cycle of greater than 99%, and the v in -to-v out dropout is limited by the r ds(on) of the top switch. in this mode the lt8610ac/lt8610ac-1 skips switch cycles, resulting in a lower switching frequency than programmed by rt . for applications that cannot allow deviation from the pro- grammed switching frequency at low v in /v out ratios use the following formula to set switching frequency: v in(min) = v out + v sw(bot) 1C f sw ? t off(min) C v sw(bot) + v sw(top) (5) where v in(min) is the minimum input voltage without skipped cycles, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.42v, ~0.21v, respectively at maximum load), f sw is the switching fre- quency ( set by rt ), and t off(min) is the minimum switch off- time. note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle. inductor selection and maximum output current the lt8610ac/lt8610ac-1 is designed to minimize so- lution size by allowing the inductor to be chosen based on the output load requirements of the application. dur- ing overload or short-circuit conditions the lt8610ac/ lt8610ac-1 safely tolerates operation with a saturated inductor through the use of a high speed peak-current mode architecture. a good first choice for the inductor value is: l = v out + v sw(bot) f sw (6) where f sw is the switching frequency in mhz, v out is the output voltage, v sw(bot) is the bottom switch drop (~0.21v) and l is the inductor value in h. lt8610ac/lt8610ac-1 8610acfa
15 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion to avoid overheating and poor efficiency, an inductor must be chosen with an rms current rating that is greater than the maximum expected output load of the application. in addition, the saturation current ( typically labeled i sat ) rating of the inductor must be higher than the load current plus 1/2 of in inductor ripple current: i l(peak) = i load(max) + 1 2 ? i l (7) where ?i l is the inductor ripple current as calculated in equation 9 and i load(max) is the maximum output load for a given application. as a quick example, an application requiring 1 a output should use an inductor with an rms rating of greater than 1a and an i sat of greater than 1.3 a. during long duration overload or short-circuit conditions, the inductor rms rating requirement is greater to avoid overheating of the inductor. to keep the efficiency high, the series resistance (dcr) should be less than 0.04, and the core material should be intended for high frequency applications. the lt8610ac/lt8610ac-1 limits the peak switch cur - rent in order to protect the switches and the system from overload faults. the top switch current limit (i lim ) is at least 6 a at low duty cycles and decreases linearly to 5a at dc = 0.8. the inductor value must then be sufficient to supply the desired maximum output current (i out(max) ), which is a function of the switch current limit (i lim ) and the ripple current. i out(max) = i lim C ? i l 2 (8) the peak-to-peak ripple current in the inductor can be calculated as follows: ? i l = v out l ? f sw ? 1C v out v in(max) ? ? ? ? ? ? (9) where f sw is the switching frequency of the lt8610ac/ lt8610ac-1, and l is the value of the inductor. there- fore, the maximum output current that the lt8610ac/ lt8610ac-1 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. the inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (i out(max) ) given the switching frequency, and maximum input voltage used in the desired application. the optimum inductor for a given application may differ from the one indicated by this design guide. a larger value inductor provides a higher maximum load current and reduces the output voltage ripple. for applications requiring smaller load currents, the value of the inductor may be lower and the lt8610ac/ lt8610ac-1 may operate with higher ripple current. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. inductor value has a very strong effect on burst mode ef - ficiency. larger value inductors allow more charge to be transferred to the output per pulse, which increases both efficiency and output voltage ripple. if higher efficiency is needed in a burst mode application, increasing inductor value can be a quick solution. for more information about maximum output current and discontinuous operation, see linear technologys application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. see application note 19. input capacitor bypass the input of the lt8610ac / lt8610ac-1 circuit with a ceramic capacitor of x7r or x5r type placed as close as possible to the v in and pgnd pins. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7 f to 10 f ceramic capacitor is adequate to bypass the lt8610ac/lt8610ac-1 and will easily handle the ripple current. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. lt8610ac/lt8610ac-1 8610acfa
16 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion step-down regulators draw current from the input sup- ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt8610ac/lt8610ac-1 and to force this very high frequency switching current into a tight local loop, mini- mizing emi. a 4.7 f capacitor is capable of this task, but only if it is placed close to the lt8610ac/lt8610ac -1 ( see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt8610ac/lt8610ac-1. a ceramic input capacitor combined with trace or cable inductance forms a high quality ( under damped) tank circuit. if the lt8610ac/lt8610ac-1 circuit is plugged into a live sup- ply, the input voltage can ring to twice its nominal value, possibly exceeding the lt8610ac/lt8610ac-1s voltage rating. this situation is easily avoided ( see linear technol- ogy application note 88). output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it filters the square wave generated by the lt8610ac/lt8610ac-1 to produce the dc output. in this role it determines the output ripple, thus low imped- ance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt8610ac/lt8610ac-1s control loop. ceramic capacitors have very low equivalent series resis- tance ( esr) and provide the best ripple performance. for good starting values, see the typical applications section. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed between v out and fb. increasing the output capacitance will also decrease the output voltage ripple. a lower value of output capacitor can be used to save space and cost but transient performance will suffer and may cause loop instability. see the typical applications in this data sheet for suggested capacitor values. when choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. a physically larger capacitor or one with a higher voltage rating may be required. ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the lt8610ac/lt8610ac-1 due to their piezoelectric nature. when in burst mode operation, the lt8610ac/lt8610ac-1s switching frequency depends on the load current, and at very light loads the lt8610ac/ lt8610ac-1 can excite the ceramic capacitor at audio fre - quencies, generating audible noise. since the lt8610ac/ lt8610ac-1 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a ca - sual ear. if this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output . low noise ceramic capacitors are also available. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the lt8610ac/ lt8610ac-1. as previously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality ( underdamped) tank circuit. if the lt8610ac/ lt8610ac-1 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceed - ing the lt8610ac/lt8610ac-1s rating. this situation is easi l y avoided ( see linear technology application note 88). enable pin the lt8610ac/lt8610 ac-1 is in shutdown when the en pin is low and active when the pin is high. the rising threshold of the en comparator is 1.015 v, with 45 mv of hysteresis. the en pin can be tied to v in if the shutdown feature is not used, or tied to a logic level if shutdown control is required. adding a resistor divider from v in to en programs the lt8610ac/lt8610ac-1 to regulate the output only when v in is above a desired voltage ( see the block diagram). typically, this threshold, v in( en) , is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. the v in(en) threshold prevents the regulator from operating at source voltages where the problems might occur. this lt8610ac/lt8610ac-1 8610acfa
17 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v in(en) = r3 r4 + 1 ? ? ? ? ? ? ? 1.015v (10) where the lt8610ac/ lt8610ac-1 will remain off until v in is above v in( en) . due to the comparator s hysteresis, switch - ing will not stop until the input falls slightly below v in( en) . when operating in burst mode operation for light load currents, the current through the v in(en) resistor network can easily be greater than the supply current consumed by the lt8610ac/lt8610ac-1. therefore, the v in(en) resistors should be large to minimize their effect on ef- ficiency at low loads. int v cc regulator an internal low dropout ( ldo) regulator produces the 3.4 v supply from v in that powers the drivers and the internal bias circuitry. the intv cc can supply enough current for the lt8610ac/lt8610ac-1s circuitry and must be bypassed to ground with a minimum of 1 f ceramic capacitor. good bypassing is necessary to supply the high transient currents required by the power mosfet gate drivers. to improve efficiency the internal ldo can also draw cur - rent from the bias pin when the bias pin is at 3.1 v or higher. typically the bias pin can be tied to the output of the lt8610ac/lt8610ac-1, or can be tied to an external supply of 3.3 v or above. if bias is connected to a supply other than v out , be sure to bypass with a local ceramic capacitor. if the bias pin is below 3.0 v, the internal ldo will consume current from v in . applications with high input voltage and high switching frequency where the internal ldo pulls current from v in will increase die temperature because of the higher power dissipation across the ldo. do not connect an external load to the intv cc pin. output voltage tracking and soft-start t he lt8610ac/ lt8610ac-1 allows the user to program its output voltage ramp rate by means of the tr/ ss pin. an inter - nal 2.2 a pulls up the tr/ ss pin to intv cc . putting an external capacitor on tr/ss enables soft starting the output to pre- vent current surge on the input supply. during the soft- start ramp the output voltage will proportionally track the tr/ ss pin voltage. for output tracking applications, tr / ss can be externally driven by another voltage source. from 0 v to 0.8 v, the tr/ss voltage will override the internal 0.8v reference input to the error amplifier, thus regulating the fb pin voltage to that of tr/ss pin. when tr/ss is above 0.8v , tracking is disabled and the feedback voltage will regulate to the internal reference voltage. the lt8610ac-1 has an additional tr/ss pin feature not included in the lt8610ac . during dropout or brownout, when the fb pin is below the regulated value, the lt8610ac-1 regulates the tr/ss pin to the same voltage as the fb pin . when the dropout or brownout condition goes away, the lt8610ac-1 output voltage will slowly ramp-up with the soft- start voltage preventing output voltage overshoot. scope shots of the lt8610ac-1 recovering from dropout and short-circuit are show in fig . 3. in the lt8610ac, the tr/ss pin may be left floating if the function is not needed. in the lt8610ac-1, the tr/ss pin must have at least 100 pf of external capacitance. figure 3. lt8610ac-1 soft starting to eliminate output voltage overshoot when exiting dropout (3a) and brownout (3b) (3b) (3a) lt8610ac/lt8610ac-1 8610acfa v out 1v/div v ss 1v/div v in 5v/div 20ms/div 12v in 3.3v in 12v in with 3.3v out at 1a 8610ac1 f03a v out 1v/div i out 2a/div v ss 1v/div 10ms/div 5.5a brownout with 12v in , 3.3v out at 1a load 8610ac1 f03b
18 for more information www.linear.com/lt8610ac a pplica t ions i n f or m a t ion an active pull-down circuit is connected to the tr/ss pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. fault conditions that clear the soft-start capacitor are the en/uv pin transitioning low, v in voltage falling too low, or thermal shutdown. output power good when the lt8610ac/ lt8610ac-1 s output voltage is within the 8% window of the regulation point, which is a v fb voltage in the range of 0.736 v to 0.864v (typical), the output voltage is considered good and the open-drain pg pin goes high impedance and is typically pulled high with an external resistor. otherwise, the internal pull- down device will pull the pg pin low. to prevent glitching both the upper and lower thresholds include 0.4% of hysteresis. the pg pin is also actively pulled low during several fault conditions: en/uv pin is below 1.015 v, intv cc has fallen too low, v in is too low, or thermal shutdown. synchronization to select low ripple burst mode operation, tie the sync pin below 0.4v ( this can be ground or a logic low output). to synchronize the lt8610ac/lt8610ac-1 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.4 v and peaks above 2.4v (up to 6v). the lt8610ac/lt8610ac-1 will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the lt8610ac may be synchronized over a 200 khz to 2.2 mhz range, while the lt8610ac-1 can only be synchronized over a 1.5 mhz to 2.2 mhz range. the r t resistor should be chosen to set the lt8610ac/ lt8610ac-1 switching frequency equal to or below the lowest synchronization input. for example, if the synchro- nization signal will be 500khz and higher, the r t should be selected for 500 khz. the slope compensation is set by the r t value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. since the synchronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by r t , then the slope compensation will be sufficient for all synchronization frequencies. for some applications it is desirable for the lt8610ac/ lt8610ac-1 to operate in pulse-skipping mode, offering two major differences from burst mode operation. first is the clock stays awake at all times and all switching cycles are aligned to the clock. second is that full switching fre - quency is reached at lower output load than in burst mode operation. these two differences come at the expense of increased quiescent current. to enable pulse-skipping mode, the sync pin is tied high either to a logic output or to the intvcc pin. the lt8610ac/lt8610ac-1 does not operate in forced continuous mode regardless of sync signal. never leave the sync pin floating. shorted and reversed input protection the lt8610ac/lt8610ac-1 will tolerate a shorted output. several features are used for protection during output short-circuit and brownout conditions. the first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. second, the bottom switch current is monitored such that if inductor current is beyond safe levels switch - ing of the top switch will be delayed until such time as the inductor current falls to safe levels. the lt8610ac-1 has a feature where the tr/ ss pin voltage will be regulated to the same voltage as the fb pin . this means the part will soft-start out of an output short-circuit or brownout condition preventing output voltage overshoot. frequency foldback behavior depends on the state of the sync pin: if the sync pin is low the switching frequency will slow while the output voltage is lower than the pro- grammed level. if the sync pin is connected to a clock source or tied high, the lt8610ac/lt8610ac-1 will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels. there is another situation to consider in systems where the output will be held high when the input to the lt8610ac/ lt8610ac-1 is absent. this may occur in battery charg - lt8610ac/lt8610ac-1 8610acfa
19 for more information www.linear.com/lt8610ac figure 4. reverse v in protection v in v in d1 lt8610ac en/uv 8610ac1 f04 gnd figure 5. recommended pcb layout for the lt8610ac v out 8610ac1 f05 outline of local ground plane sw bst bias intv cc gnd 9 10 11 12 13 14 15 pg fb gnd v out 16 sync tr/ss rt en/uv v in 1 2 3 4 5 6 7 8 v out line to bias vias to ground plane ing applications or in battery - backup systems where a battery or some other supply is diode ored with the lt8610ac/lt8610ac-1s output. if the v in pin is allowed to float and the en pin is held high ( either by a logic signal or because it is tied to v in ), then the lt8610ac/ lt8610ac-1s internal circuitry will pull its quiescent cur- rent through its sw pin. this is acceptable if the system can tolerate several a in this state. if the en pin is grounded the sw pin current will drop to near 1a . however, if the v in pin is grounded while the output is held high, regardless of en, parasitic body diodes inside the lt8610ac/lt8610ac-1 can pull current from the output through the sw pin and the v in pin. figure 4 shows a connection of the v in and en/uv pins that will allow the lt8610ac/lt8610ac-1 to run only when the input voltage is present and that protects against a shorted or reversed input. a pplica t ions i n f or m a t ion pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 5 shows the recommended component placement with trace, ground plane and via locations. note that large, switched currents flow in the lt8610ac/lt8610ac-1s v in pins, gnd pins, and the input capacitor ( c1). the loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the v in and gnd pins. when using a physically large input capacitor the resulting loop may become too large in which case using a small case/value capacitor placed close to the v in and gnd pins plus a larger capacitor further away is preferred. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local , unbroken ground plane under the application circuit on the layer closest to the surface layer. the sw and boost nodes should be as small as possible. finally, keep the fb and rt nodes small so that the ground traces will shield them from the sw and boost nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also acts as a heat sink thermally. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt8610ac/ lt8610ac -1 to additional ground planes within the circuit board and on the bottom side. unlike the lt8610, the lt8610ac/ lt8610ac-1 has pin 7 as an nc ( no connect) pin. this pin can be soldered to gnd to have an lt8610 compatible pcb layout. alternatively, pin 7 can be left unconnected to help meet pcb clearance and creepage requirements between the v in and gnd traces. lt8610ac/lt8610ac-1 8610acfa
20 for more information www.linear.com/lt8610ac typical a pplica t ions bst v in en/uv sync intv cc tr/ss rt sw lt8610ac-1 gnd bias 8610ac1 ta02 pg fb 0.1f v out 5v 3.5a 4.7f v in 5.5v to 42v 1f 10nf 10pf 2.2h 1m 191k f sw = 2mhz l: coilcraft xal 5030 18.2k 47f* 1210 x5r power good 100k 5v 2mhz step-down converter 12v step-down converter bst v in en/uv sync intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta09 pg fb 0.1f v out 12v 3.5a 4.7f v in 12.5v to 42v 1f 10nf 10pf 10h 1m 71.5k f sw = 1mhz 41.2k 47f* 1210 x5r power good 100k l: vishay ihlp-2525cz-01 *consider doubling output capacitance if application requires low output voltage ripple in burst mode operation. figure 6. lt8610ac case temperature rise input voltage (v) case temperature rise (c) 120 140 16 24 36 8610ac1 f06 80 20 40 0 100 60 8 12 20 28 32 f sw = 2mhz i load = 2.5a f sw = 2mhz i load = 3.5a t a = 25c f sw = 1mhz i load = 3.5a (lt8610ac) high temperature considerations for higher ambient temperatures, care should be taken in the layout of the pcb to ensure good heat sinking of the lt8610ac/lt8610ac-1. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the lt8610ac/lt8610ac-1. placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient temperature approaches the maximum junction rating. power dissipa - tion within the lt8610ac/lt8610ac-1 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. the die temperature is calculated by multiplying the lt8610ac/ lt8610ac-1 power dissipation by the thermal resistance from junction to ambient. the lt8610ac/lt8610ac-1 will stop switching and indicate a fault condition if safe junction temperature is exceeded. temperature rise of the lt8610ac/lt8610ac-1 is worst when operating at high load, high v in , and high switching a pplica t ions i n f or m a t ion frequency. if the case temperature is too high for a given application, then either v in , switching frequency, or load current can be decreased to reduce the temperature to an acceptable level. figure 6 shows an example of how case temperature can be managed by reducing v in , switching frequency, or load. lt8610ac/lt8610ac-1 8610acfa
21 for more information www.linear.com/lt8610ac 1.8v 2mhz step-down converter bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta06 fb 0.1f v out 1.8v 3.5a 4.7f v in 3.0v to 15v (42v transient) 1f 10nf 4.7pf 1h 1m 806k f sw = 2mhz 18.2k 100f* 1210 x5r l: vishay ihlp-2020bz-01 5v step-down converter bst v in en/uv sync intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta03 pg fb 0.1f v out 5v 3.5a 4.7f v in 5.5v to 42v 1f 10nf 10pf 10h 1m 191k f sw = 400khz 110k 100f* 1210 x5r power good 100k l: vishay ihlp-2525cz-01 typical a pplica t ions *consider doubling output capacitance if application requires low output voltage ripple in burst mode operation. lt8610ac/lt8610ac-1 8610acfa
22 for more information www.linear.com/lt8610ac typical a pplica t ions *consider doubling output capacitance if application requires low output voltage ripple in burst mode operation. 3.3v 2mhz step-down converter bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac-1 gnd bias 8610ac1 ta04 fb 0.1f v out 3.3v 3.5a 4.7f v in 3.8v to 27v (42v transient) 1f 10nf 4.7pf 2.2h 1m 316k f sw = 2mhz 18.2k 47f* 1210 x5r l: coilcraft xal 5030 1.8v step-down converter bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta07 fb 0.1f v out 1.8v 3.5a 4.7f v in 3.0v to 42v 1f 10nf 4.7pf 4.7h 1m 806k f sw = 400khz 110k 47f* 3 1210 x5r l: vishay ihlp-2020bz-01 lt8610ac/lt8610ac-1 8610acfa
23 for more information www.linear.com/lt8610ac typical a pplica t ions 3.3v step-down converter ultralow emi 5v 2.5a step-down converter bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta05 fb 0.1f v out 3.3v 3.5a 4.7f v in 3.8v to 42v 1f 10nf 4.7pf 8.2h 1m 316k f sw = 400khz 110k 100f* 1210 x5r l: vishay ihlp-2525bd-01 bst v in en/uv pg sync intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta11 fb 0.1f v out 5v 3.5a 4.7f v in 5.5v to 42v 1f 10nf 10pf 4.7h 4.7h 1m fb1 bead 191k f sw = 800khz 52.3k 4.7f 4.7f 47f* 1210 x5r fb1: tdk mpz2012s101a l: vishay ihlp-2020bz-01 *consider doubling output capacitance if application requires low output voltage ripple in burst mode operation. lt8610ac/lt8610ac-1 8610acfa
24 for more information www.linear.com/lt8610ac p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. msop (mse16) 0213 rev f 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16 16151413121110 1 2 3 4 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package 16-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1667 rev f) lt8610ac/lt8610ac-1 8610acfa
25 for more information www.linear.com/lt8610ac r evision h is t ory rev date description page number a 05/15 added the lt8610ac-1 version added the lt8610ac-1 version and description added the lt8610ac-1 version to order information added the lt8610ac-1 version to electrical characteristics and note 2 added the lt8610ac-1 version to pin functions added the lt8610ac-1 version to operation section added the lt8610ac-1 version to applications section added the lt8610ac-1 typical application all 1 2 3 7 11 12 to 22 21, 22, 26 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. lt8610ac/lt8610ac-1 8610acfa
26 for more information www.linear.com/lt8610ac ? linear technology corporation 2014 lt 0515 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt8610ac r ela t e d p ar t s typical a pplica t ion 3.3v and 1.8v with ratio tracking ultralow i q 2.5v, 3.3v step-down with ldo bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac gnd bias fb 0.1f v out1 3.3v 3.5a 4.7f v in 3.8v to 42v 1f 10nf 4.7pf 5.6h 255k 80.6k f sw = 500khz 88.7k bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac gnd bias 8610ac1 ta08 fb 0.1f v out2 1.8v 3.5a 4.7f 1f 4.7pf 3.3h 100k 30.1k 80.6k f sw = 500khz 88.7k 10k 100f* 1210 x5r 47f* 1210 x5r l: vishay ihlp-2020cz-01, 5.6h l: vishay ihlp-2020cz-01, 3.3h bst v in en/uv sync pg intv cc tr/ss rt sw lt8610ac-1 gnd bias 8610ac1 ta10 fb 0.1f v out1 3.3v 3.5a 4.7f v in 3.8v to 27v 1f 10nf 4.7pf 2.2h 1m 316k 2.2f v out2 2.5v 20ma f sw = 2mhz 18.2k 47f* 1210 x5r in lt3008-2.5 shdn out sense l: vishay ihlp-2020bz-01 part number description comments lt8610a/ lt8610ab 42v, 3.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4 v to 42 v, v out(min) = 0.97 v, i q = 2.5 a, i sd < 1a, msop-16e package lt8610 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4 v to 42 v, v out(min) = 0.97 v, i q = 2.5 a, i sd < 1a, msop-16e package lt8611 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a and input/output current limit/monitor v in : 3.4 v to 42 v, v out(min) = 0.97 v, i q = 2.5 a, i sd < 1a, 3mm 5mm qfn-24 package lt8620 65v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4 v to 65 v, v out(min) = 0.97 v, i q = 2.5 a, i sd < 1a, msop-16e and 3mm 5mm qfn-24 packages lt8614 42v, 4a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in : 3.4 v to 42 v, v out(min) = 0.97 v, i q = 2.5 a, i sd < 1a, 3mm 4mm qfn package lt8612 42v, 6a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 3a v in : 3.4v to 42v, v out(min) = 0.97v, i q = 3a, i sd < 1a, 3mm 6mm qfn package lt3975 4.3v, 2.5a, 2.2mhz micropower step-down dc/dc converter with i q = 2.7a v in : 4.3v to 42v, v out(min) = 1.2v, i q = 2.7a, i sd < 1a, msop-16e package lt3976 40v, 5a, 2.2mhz micropower step-down dc/dc converter with i q = 3.3a v in : 4.3v to 40v, v out(min) = 1.2v, i q = 3.3a, i sd < 1a, msop-16e and 3mm 5mm qfn-24 packages *consider doubling output capacitance if application requires low output voltage ripple in burst mode operation. lt8610ac/lt8610ac-1 8610acfa

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